Publications

@article{vitabileOptimizedArchitectureCGA2022,

title = {An Optimized Architecture for CGA Operations and Its Application to a Simulated Robotic Arm},

author = { Salvatore Vitabile and Silvia Franchini and Giorgio Vassallo},

doi = {10.3390/electronics11213508},

issn = {2079-9292},

year  = {2022},

date = {2022-01-01},

journal = {Electronics (Switzerland)},

volume = {11},

number = {21},

abstract = {Conformal geometric algebra (CGA) is a new geometric computation tool that is attracting growing attention in many research fields, such as computer graphics, robotics, and computer vision. Regarding the robotic applications, new approaches based on CGA have been proposed to efficiently solve problems as the inverse kinematics and grasping of a robotic arm. The hardware acceleration of CGA operations is required to meet real-time performance requirements in embedded robotic platforms. In this paper, we present a novel embedded coprocessor for accelerating CGA operations in robotic tasks. Two robotic algorithms, namely, inverse kinematics and grasping of a human-arm-like kinematics chain, are used to prove the effectiveness of the proposed approach. The coprocessor natively supports the entire set of CGA operations including both basic operations (products, sums/differences, and unary operations) and complex operations as rigid body motion operations (reflections, rotations, translations, and dilations). The coprocessor prototype is implemented on the Xilinx ML510 development platform as a complete system-on-chip (SoC), integrating both a PowerPC processing core and a CGA coprocessing core on the same Xilinx Virtex-5 FPGA chip. Experimental results show speedups of 78texttimes and 246texttimes for inverse kinematics and grasping algorithms, respectively, with respect to the execution on the PowerPC processor. textcopyright 2022 by the authors.},

keywords = {Application-specific processors, Clifford algebra, Computational geometry, Conformal geometric algebra, Embedded coprocessors, Field Programmable Gate Arrays, FPGA prototyping, Geometric algebra, grasping, human-like robotic arms, inverse kinematics, Robotics},

pubstate = {published},

tppubtype = {article}

}

@article{vitabile_optimized_2022,

title = {An Optimized Architecture for CGA Operations and Its Application to a Simulated Robotic Arm},

author = {Salvatore Vitabile and Silvia Franchini and Giorgio Vassallo},

doi = {10.3390/electronics11213508},

issn = {2079-9292},

year  = {2022},

date = {2022-01-01},

journal = {Electronics (Switzerland)},

volume = {11},

number = {21},

abstract = {Conformal geometric algebra (CGA) is a new geometric computation tool that is attracting growing attention in many research fields, such as computer graphics, robotics, and computer vision. Regarding the robotic applications, new approaches based on CGA have been proposed to efficiently solve problems as the inverse kinematics and grasping of a robotic arm. The hardware acceleration of CGA operations is required to meet real-time performance requirements in embedded robotic platforms. In this paper, we present a novel embedded coprocessor for accelerating CGA operations in robotic tasks. Two robotic algorithms, namely, inverse kinematics and grasping of a human-arm-like kinematics chain, are used to prove the effectiveness of the proposed approach. The coprocessor natively supports the entire set of CGA operations including both basic operations (products, sums/differences, and unary operations) and complex operations as rigid body motion operations (reflections, rotations, translations, and dilations). The coprocessor prototype is implemented on the Xilinx ML510 development platform as a complete system-on-chip (SoC), integrating both a PowerPC processing core and a CGA coprocessing core on the same Xilinx Virtex-5 FPGA chip. Experimental results show speedups of 78× and 246× for inverse kinematics and grasping algorithms, respectively, with respect to the execution on the PowerPC processor. © 2022 by the authors.},

keywords = {Application-specific processors, Clifford algebra, Computational geometry, Conformal geometric algebra, Embedded coprocessors, Field Programmable Gate Arrays, FPGA prototyping, Geometric algebra, grasping, human-like robotic arms, inverse kinematics, Robotics},

pubstate = {published},

tppubtype = {article}

}

@article{franchiniEmbeddedCoprocessorsNative2017,

title = {Embedded Coprocessors for Native Execution of Geometric Algebra Operations},

author = { Silvia Franchini and Antonio Gentile and Filippo Sorbello and Giorgio Vassallo and Salvatore Vitabile},

doi = {10.1007/s00006-016-0662-1},

issn = {0188-7009},

year  = {2017},

date = {2017-01-01},

journal = {Advances in Applied Clifford Algebras},

volume = {27},

number = {1},

pages = {559--580},

abstract = {Clifford algebra or geometric algebra (GA) is a simple and intuitive way to model geometric objects and their transformations. Operating in high-dimensional vector spaces with significant computational costs, the practical use of GA requires dedicated software and/or hardware architectures to directly support Clifford data types and operators. In this paper, a family of embedded coprocessors for the native execution of GA operations is presented. The paper shows the evolution of the coprocessor family focusing on the latest two architectures that offer direct hardware support to up to five-dimensional Clifford operations. The proposed coprocessors exploit hardware-oriented representations of GA elements and operators properly conceived to obtain fast performing implementations. The coprocessor prototypes, implemented on field programmable gate arrays development boards, show significant speedups of about one order of magnitude with respect to the baseline software library Gaigen running on a general-purpose processor. The paper also presents an execution analysis of different GA-based applications, namely inverse kinematics of a robot, optical motion capture, raytracing, and medical image processing, showing good speedups with respect to the baseline general-purpose implementation. textcopyright 2016, Springer International Publishing.},

keywords = {Application-specific processors, Clifford algebra, Conformal geometric algebra, Embedded coprocessors, Field Programmable Gate Arrays, FPGA prototyping, Geometric algebra},

pubstate = {published},

tppubtype = {article}

}

@article{hildenbrandGAPPCOEasyConfigure2017,

title = {GAPPCO: An Easy to Configure Geometric Algebra Coprocessor Based on GAPP Programs},

author = { Dietmar Hildenbrand and Silvia Franchini and Antonio Gentile and Giorgio Vassallo and Salvatore Vitabile},

doi = {10.1007/s00006-016-0755-x},

issn = {0188-7009},

year  = {2017},

date = {2017-01-01},

journal = {Advances in Applied Clifford Algebras},

volume = {27},

number = {3},

pages = {2115--2132},

abstract = {Because of the high numeric complexity of Geometric Algebra, its use in engineering applications relies heavily on tools and devices for efficient implementations. In this article, we present a novel hardware design for a Geometric Algebra coprocessor, called GAPPCO, which is based on Geometric Algebra Parallelism Programs (GAPP). GAPPCO is a design for a coprocessor combining the advantages of optimizing software with a configurable hardware able to implement arbitrary Geometric Algebra algorithms. The idea is to have a fixed hardware easily and fast to be configured for different algorithms. We describe the new hardware design together with the complete tool chain for its configuration. textcopyright 2017, Springer International Publishing.},

keywords = {Clifford algebra, Embedded coprocessors, Field Programmable Gate Arrays, FPGA prototyping, Gaalop, GAPP, GAPPCO, Geometric algebra, Geometric Algebra computing, Pre-compilers, Software hardware co-design},

pubstate = {published},

tppubtype = {article}

}

@article{hildenbrand_gappco_2017,

title = {GAPPCO: An Easy to Configure Geometric Algebra Coprocessor Based on GAPP Programs},

author = {Dietmar Hildenbrand and Silvia Franchini and Antonio Gentile and Giorgio Vassallo and Salvatore Vitabile},

doi = {10.1007/s00006-016-0755-x},

issn = {0188-7009},

year  = {2017},

date = {2017-01-01},

journal = {Advances in Applied Clifford Algebras},

volume = {27},

number = {3},

pages = {2115–2132},

abstract = {Because of the high numeric complexity of Geometric Algebra, its use in engineering applications relies heavily on tools and devices for efficient implementations. In this article, we present a novel hardware design for a Geometric Algebra coprocessor, called GAPPCO, which is based on Geometric Algebra Parallelism Programs (GAPP). GAPPCO is a design for a coprocessor combining the advantages of optimizing software with a configurable hardware able to implement arbitrary Geometric Algebra algorithms. The idea is to have a fixed hardware easily and fast to be configured for different algorithms. We describe the new hardware design together with the complete tool chain for its configuration. © 2017, Springer International Publishing.},

keywords = {Clifford algebra, Embedded coprocessors, Field Programmable Gate Arrays, FPGA prototyping, Gaalop, GAPP, GAPPCO, Geometric algebra, Geometric Algebra computing, Pre-compilers, Software hardware co-design},

pubstate = {published},

tppubtype = {article}

}

@article{franchini_embedded_2017,

title = {Embedded Coprocessors for Native Execution of Geometric Algebra Operations},

author = {Silvia Franchini and Antonio Gentile and Filippo Sorbello and Giorgio Vassallo and Salvatore Vitabile},

doi = {10.1007/s00006-016-0662-1},

issn = {0188-7009},

year  = {2017},

date = {2017-01-01},

journal = {Advances in Applied Clifford Algebras},

volume = {27},

number = {1},

pages = {559–580},

abstract = {Clifford algebra or geometric algebra (GA) is a simple and intuitive way to model geometric objects and their transformations. Operating in high-dimensional vector spaces with significant computational costs, the practical use of GA requires dedicated software and/or hardware architectures to directly support Clifford data types and operators. In this paper, a family of embedded coprocessors for the native execution of GA operations is presented. The paper shows the evolution of the coprocessor family focusing on the latest two architectures that offer direct hardware support to up to five-dimensional Clifford operations. The proposed coprocessors exploit hardware-oriented representations of GA elements and operators properly conceived to obtain fast performing implementations. The coprocessor prototypes, implemented on field programmable gate arrays development boards, show significant speedups of about one order of magnitude with respect to the baseline software library Gaigen running on a general-purpose processor. The paper also presents an execution analysis of different GA-based applications, namely inverse kinematics of a robot, optical motion capture, raytracing, and medical image processing, showing good speedups with respect to the baseline general-purpose implementation. © 2016, Springer International Publishing.},

keywords = {Application-specific processors, Clifford algebra, Conformal geometric algebra, Embedded coprocessors, Field Programmable Gate Arrays, FPGA prototyping, Geometric algebra},

pubstate = {published},

tppubtype = {article}

}

@article{franchiniConformalALUConformalGeometric2015,

title = {ConformalALU: A Conformal Geometric Algebra Coprocessor for Medical Image Processing},

author = { Silvia Franchini and Antonio Gentile and Filippo Sorbello and Giorgio Vassallo and Salvatore Vitabile},

doi = {10.1109/TC.2014.2315652},

issn = {0018-9340},

year  = {2015},

date = {2015-01-01},

journal = {IEEE Transactions on Computers},

volume = {64},

number = {4},

pages = {955--970},

abstract = {Medical imaging involves important computational geometric problems, such as image segmentation and analysis, shape approximation, three-dimensional (3D) modeling, and registration of volumetric data. In the last few years, Conformal Geometric Algebra (CGA), based on five-dimensional (5D) Clifford Algebra, is emerging as a new paradigm that offers simple and universal operators for the representation and solution of complex geometric problems. However, the widespread use of CGA has been so far hindered by its high dimensionality and computational complexity. This paper proposes a simplified formulation of the conformal geometric operations (reflections, rotations, translations, and uniform scaling) aimed at a parallel hardware implementation. A specialized coprocessing architecture (ConformalALU) that offers direct hardware support to the new CGA operators, is also presented. The ConformalALU has been prototyped as a complete System-on-Programmable-Chip (SoPC) on the Xilinx ML507 FPGA board, containing a Virtex-5 FPGA device. Experimental results show average speedups of one order of magnitude for CGA rotations, translations, and dilations with respect to the geometric algebra software library Gaigen running on the general-purpose PowerPC processor embedded in the target FPGA device. A suite of medical imaging applications, including segmentation, 3D modeling and registration of medical data, has been used as testbench to evaluate the coprocessor effectiveness. textcopyright 2015 IEEE.},

keywords = {3D modeling, Clifford algebra, Computational geometry, Conformal geometric algebra, Embedded coprocessors, Field Programmable Gate Arrays, FPGA prototyping, Geometric algebra, Growing Neural Gas, iterative closest point (ICP), marching spheres, Medical image registration, Medical Imaging, Segmentation, systems-on-programmable-chip, thin-plate spline robust point matching (TPS-RPM), Volume registration},

pubstate = {published},

tppubtype = {article}

}

@article{franchini_conformalalu_2015,

title = {ConformalALU: A conformal geometric algebra coprocessor for medical image processing},

author = {Silvia Franchini and Antonio Gentile and Filippo Sorbello and Giorgio Vassallo and Salvatore Vitabile},

doi = {10.1109/TC.2014.2315652},

issn = {0018-9340},

year  = {2015},

date = {2015-01-01},

journal = {IEEE Transactions on Computers},

volume = {64},

number = {4},

pages = {955–970},

abstract = {Medical imaging involves important computational geometric problems, such as image segmentation and analysis, shape approximation, three-dimensional (3D) modeling, and registration of volumetric data. In the last few years, Conformal Geometric Algebra (CGA), based on five-dimensional (5D) Clifford Algebra, is emerging as a new paradigm that offers simple and universal operators for the representation and solution of complex geometric problems. However, the widespread use of CGA has been so far hindered by its high dimensionality and computational complexity. This paper proposes a simplified formulation of the conformal geometric operations (reflections, rotations, translations, and uniform scaling) aimed at a parallel hardware implementation. A specialized coprocessing architecture (ConformalALU) that offers direct hardware support to the new CGA operators, is also presented. The ConformalALU has been prototyped as a complete System-on-Programmable-Chip (SoPC) on the Xilinx ML507 FPGA board, containing a Virtex-5 FPGA device. Experimental results show average speedups of one order of magnitude for CGA rotations, translations, and dilations with respect to the geometric algebra software library Gaigen running on the general-purpose PowerPC processor embedded in the target FPGA device. A suite of medical imaging applications, including segmentation, 3D modeling and registration of medical data, has been used as testbench to evaluate the coprocessor effectiveness. © 2015 IEEE.},

keywords = {3D modeling, Clifford algebra, Computational geometry, Conformal geometric algebra, Embedded coprocessors, Field Programmable Gate Arrays, FPGA prototyping, Geometric algebra, Growing Neural Gas, iterative closest point (ICP), marching spheres, Medical image registration, Medical Imaging, Segmentation, systems-on-programmable-chip, thin-plate spline robust point matching (TPS-RPM), Volume registration},

pubstate = {published},

tppubtype = {article}

}

@article{franchiniDesignImplementationEmbedded2013,

title = {Design and Implementation of an Embedded Coprocessor with Native Support for 5D, Quadruple-Based Clifford Algebra},

author = { Silvia Franchini and Antonio Gentile and Filippo Sorbello and Giorgio Vassallo and Salvatore Vitabile},

doi = {10.1109/TC.2012.225},

issn = {0018-9340},

year  = {2013},

date = {2013-01-01},

journal = {IEEE Transactions on Computers},

volume = {62},

number = {12},

pages = {2366--2381},

abstract = {Geometric or Clifford algebra (CA) is a powerful mathematical tool that offers a natural and intuitive way to model geometric facts in a number of research fields, such as robotics, machine vision, and computer graphics. Operating in higher dimensional spaces, its practical use is hindered, however, by a significant computational cost, only partially addressed by dedicated software libraries and hardware/software codesigns. For low-dimensional algebras, several dedicated hardware accelerators and coprocessing architectures have been already proposed in the literature. This paper introduces the architecture of CliffordALU5, an embedded coprocessing core conceived for native execution of up to 5D CA operations. CliffordALU5 exploits a novel, hardware-oriented representation of the algebra elements that allows for faster execution of Clifford operations. In this paper, a prototype implementation of a complete system-on-chip (SOC) based on CliffordALU5 is presented. This prototype integrates an embedded processing soft-core based on the PowerPC 405 and a CliffordALU5 coprocessor on a Xilinx XUPV2P Field Programmable Gate Array (FPGA) board. Test results show a 5texttimes average speedup for 4D Clifford products and a 4texttimes average speedup for 5D Clifford products against the same operations in Gaigen 2, a CA software library generator running on the general-purpose PowerPC processor. This paper also presents an execution analysis of three different applications in three diverse domains, namely, inverse kinematics of a robot, optical motion capture, and raytracing, showing an average speedup between 3texttimes and 4texttimes with respect to the baseline Gaigen 2 implementation. Finally, a multicore approach to higher dimensional CA based on CliffordALU5 is discussed. textcopyright 1968-2012 IEEE.},

keywords = {Application-specific processors, Clifford algebra, Computational geometry, Computer graphics, Embedded coprocessors, Field Programmable Gate Arrays, FPGA prototyping, Geometric algebra, inverse kinematics, Motion capture, Raytracing, robotic arm, Robotics},

pubstate = {published},

tppubtype = {article}

}

@article{franchini_design_2013,

title = {Design and implementation of an embedded coprocessor with native support for 5D, quadruple-based clifford algebra},

author = {Silvia Franchini and Antonio Gentile and Filippo Sorbello and Giorgio Vassallo and Salvatore Vitabile},

doi = {10.1109/TC.2012.225},

issn = {0018-9340},

year  = {2013},

date = {2013-01-01},

journal = {IEEE Transactions on Computers},

volume = {62},

number = {12},

pages = {2366–2381},

abstract = {Geometric or Clifford algebra (CA) is a powerful mathematical tool that offers a natural and intuitive way to model geometric facts in a number of research fields, such as robotics, machine vision, and computer graphics. Operating in higher dimensional spaces, its practical use is hindered, however, by a significant computational cost, only partially addressed by dedicated software libraries and hardware/software codesigns. For low-dimensional algebras, several dedicated hardware accelerators and coprocessing architectures have been already proposed in the literature. This paper introduces the architecture of CliffordALU5, an embedded coprocessing core conceived for native execution of up to 5D CA operations. CliffordALU5 exploits a novel, hardware-oriented representation of the algebra elements that allows for faster execution of Clifford operations. In this paper, a prototype implementation of a complete system-on-chip (SOC) based on CliffordALU5 is presented. This prototype integrates an embedded processing soft-core based on the PowerPC 405 and a CliffordALU5 coprocessor on a Xilinx XUPV2P Field Programmable Gate Array (FPGA) board. Test results show a 5× average speedup for 4D Clifford products and a 4× average speedup for 5D Clifford products against the same operations in Gaigen 2, a CA software library generator running on the general-purpose PowerPC processor. This paper also presents an execution analysis of three different applications in three diverse domains, namely, inverse kinematics of a robot, optical motion capture, and raytracing, showing an average speedup between 3× and 4× with respect to the baseline Gaigen 2 implementation. Finally, a multicore approach to higher dimensional CA based on CliffordALU5 is discussed. © 1968-2012 IEEE.},

keywords = {Application-specific processors, Clifford algebra, Computational geometry, Computer graphics, Embedded coprocessors, Field Programmable Gate Arrays, FPGA prototyping, Geometric algebra, inverse kinematics, Motion capture, Raytracing, robotic arm, Robotics},

pubstate = {published},

tppubtype = {article}

}

@article{franchiniDesignSpaceExploration2012,

title = {Design Space Exploration of Parallel Embedded Architectures for Native Clifford Algebra Operations},

author = { Silvia Franchini and Antonio Gentile and Filippo Sorbello and Giorgio Vassallo and Salvatore Vitabile},

doi = {10.1109/MDT.2012.2206150},

issn = {0740-7475},

year  = {2012},

date = {2012-01-01},

journal = {IEEE Design and Test of Computers},

volume = {29},

number = {3},

pages = {60--69},

abstract = {The design space exploration of parallel embedded architectures that natively support Clifford algebra with different costs, performance and precision is studied. First, the most common applications of geometric algebra have been profiled in order to find the most frequent Clifford algebra operations to be natively supported on the coprocessors. The coprocessor design space has been explored using different design parameters. The parallel execution flow, as well as pipelining techniques, have been chosen for quadruple-based architectures to permit the fastest execution of the most frequent operation. Experimental tests concerned design space exploration, in terms of area cost, relative error, latencies and speedup, of the various implemented architectures based on different sets of architectural parameters, such as the number of multipliers and the coefficient precision. The coprocessor CliffordALU shows an effective 5x average speedup for Clifford products against the same operations in Gaigen-2, a geometric algebra software library generator for general-purpose processors.},

keywords = {Application-specific processors, Clifford algebra, Computational geometry, Design space exploration, Embedded coprocessors, Field Programmable Gate Arrays, FPGA prototyping, Geometric algebra},

pubstate = {published},

tppubtype = {article}

}

@article{franchini_design_2012,

title = {Design space exploration of parallel embedded architectures for native clifford algebra operations},

author = {Silvia Franchini and Antonio Gentile and Filippo Sorbello and Giorgio Vassallo and Salvatore Vitabile},

doi = {10.1109/MDT.2012.2206150},

issn = {0740-7475},

year  = {2012},

date = {2012-01-01},

journal = {IEEE Design and Test of Computers},

volume = {29},

number = {3},

pages = {60–69},

abstract = {The design space exploration of parallel embedded architectures that natively support Clifford algebra with different costs, performance and precision is studied. First, the most common applications of geometric algebra have been profiled in order to find the most frequent Clifford algebra operations to be natively supported on the coprocessors. The coprocessor design space has been explored using different design parameters. The parallel execution flow, as well as pipelining techniques, have been chosen for quadruple-based architectures to permit the fastest execution of the most frequent operation. Experimental tests concerned design space exploration, in terms of area cost, relative error, latencies and speedup, of the various implemented architectures based on different sets of architectural parameters, such as the number of multipliers and the coefficient precision. The coprocessor CliffordALU shows an effective 5x average speedup for Clifford products against the same operations in Gaigen-2, a geometric algebra software library generator for general-purpose processors.},

keywords = {Application-specific processors, Clifford algebra, Computational geometry, Design space exploration, Embedded coprocessors, Field Programmable Gate Arrays, FPGA prototyping, Geometric algebra},

pubstate = {published},

tppubtype = {article}

}

@article{franchiniFixedSizeQuadruplesNew2011,

title = {Fixed-Size Quadruples for a New, Hardware-Oriented Representation of the 4D Clifford Algebra},

author = { Silvia Franchini and Antonio Gentile and Filippo Sorbello and Giorgio Vassallo and Salvatore Vitabile},

doi = {10.1007/s00006-010-0258-0},

issn = {1661-4909},

year  = {2011},

date = {2011-01-01},

journal = {Advances in Applied Clifford Algebras},

volume = {21},

number = {2},

pages = {315--340},

abstract = {Clifford algebra (geometric algebra) offers a natural and intuitive way to model geometry in fields as robotics, machine vision and computer graphics. This paper proposes a new representation based on fixed-size elements (quadruples) of 4D Clifford algebra and demonstrates that this choice leads to an algorithmic simplification which in turn leads to a simpler and more compact hardware implementation of the algebraic operations. In order to prove the advantages of the new, quadruple-based representation over the classical representation based on homogeneous elements, a coprocessing core supporting the new fixed-size Clifford operands, namely Quad-CliffoSor (Quadruple-based Clifford coprocesSor) was designed and prototyped on an FPGA board. Test results show the potential to achieve a 23texttimes speedup for Clifford products and a 33texttimes speedup for Clifford sums and differences compared to the same operations executed by a software library running on a general-purpose processor. textcopyright 2010 Springer Basel AG.},

keywords = {Application-specific processors, Clifford algebra, Computational geometry, Embedded coprocessors, Field Programmable Gate Arrays, FPGA prototyping, Geometric algebra},

pubstate = {published},

tppubtype = {article}

}

@article{franchini_fixed-size_2011,

title = {Fixed-Size Quadruples for a New, Hardware-Oriented Representation of the 4D Clifford Algebra},

author = {Silvia Franchini and Antonio Gentile and Filippo Sorbello and Giorgio Vassallo and Salvatore Vitabile},

doi = {10.1007/s00006-010-0258-0},

issn = {1661-4909},

year  = {2011},

date = {2011-01-01},

journal = {Advances in Applied Clifford Algebras},

volume = {21},

number = {2},

pages = {315–340},

abstract = {Clifford algebra (geometric algebra) offers a natural and intuitive way to model geometry in fields as robotics, machine vision and computer graphics. This paper proposes a new representation based on fixed-size elements (quadruples) of 4D Clifford algebra and demonstrates that this choice leads to an algorithmic simplification which in turn leads to a simpler and more compact hardware implementation of the algebraic operations. In order to prove the advantages of the new, quadruple-based representation over the classical representation based on homogeneous elements, a coprocessing core supporting the new fixed-size Clifford operands, namely Quad-CliffoSor (Quadruple-based Clifford coprocesSor) was designed and prototyped on an FPGA board. Test results show the potential to achieve a 23× speedup for Clifford products and a 33× speedup for Clifford sums and differences compared to the same operations executed by a software library running on a general-purpose processor. © 2010 Springer Basel AG.},

keywords = {Application-specific processors, Clifford algebra, Computational geometry, Embedded coprocessors, Field Programmable Gate Arrays, FPGA prototyping, Geometric algebra},

pubstate = {published},

tppubtype = {article}

}

@article{franchiniEmbeddedFPGAbasedComputer2009,

title = {An Embedded, FPGA-based Computer Graphics Coprocessor with Native Geometric Algebra Support},

author = { Silvia Franchini and Antonio Gentile and Filippo Sorbello and Giorgio Vassallo and Salvatore Vitabile},

doi = {10.1016/j.vlsi.2008.09.010},

issn = {0167-9260},

year  = {2009},

date = {2009-01-01},

journal = {Integration, the VLSI Journal},

volume = {42},

number = {3},

pages = {346--355},

abstract = {The representation of geometric objects and their transformation are the two key aspects in computer graphics applications. Traditionally, computer-intensive matrix calculations are involved in modeling and rendering three-dimensional (3D) scenery. Geometric algebra (aka Clifford algebra) is attracting attention as a natural way to model geometric facts and as a powerful analytical tool for symbolic calculations. In this paper, the architecture of Clifford coprocessor (CliffoSor) is introduced. CliffoSor is an embedded parallel coprocessing core that offers direct hardware support to Clifford algebra operators. A prototype implementation on a programmable gate array (FPGA) board is detailed. Initial test results show the potential to achieve a 20texttimes speedup for 3D vector rotations, a 12texttimes speedup for Clifford sums and differences, and more than a 4texttimes speedup for Clifford products, compared to the analogous operations in GAIGEN, a standard geometric algebra library generator for general-purpose processors. An execution analysis of a raytracing application is also presented. textcopyright 2008 Elsevier B.V. All rights reserved.},

keywords = {Application-specific processors, Clifford algebra, Computational geometry, Embedded coprocessors, Field Programmable Gate Arrays, FPGA prototyping, Geometric algebra},

pubstate = {published},

tppubtype = {article}

}

@article{franchini_embedded_2009,

title = {An embedded, FPGA-based computer graphics coprocessor with native geometric algebra support},

author = {Silvia Franchini and Antonio Gentile and Filippo Sorbello and Giorgio Vassallo and Salvatore Vitabile},

doi = {10.1016/j.vlsi.2008.09.010},

issn = {0167-9260},

year  = {2009},

date = {2009-01-01},

journal = {Integration, the VLSI Journal},

volume = {42},

number = {3},

pages = {346–355},

abstract = {The representation of geometric objects and their transformation are the two key aspects in computer graphics applications. Traditionally, computer-intensive matrix calculations are involved in modeling and rendering three-dimensional (3D) scenery. Geometric algebra (aka Clifford algebra) is attracting attention as a natural way to model geometric facts and as a powerful analytical tool for symbolic calculations. In this paper, the architecture of Clifford coprocessor (CliffoSor) is introduced. CliffoSor is an embedded parallel coprocessing core that offers direct hardware support to Clifford algebra operators. A prototype implementation on a programmable gate array (FPGA) board is detailed. Initial test results show the potential to achieve a 20× speedup for 3D vector rotations, a 12× speedup for Clifford sums and differences, and more than a 4× speedup for Clifford products, compared to the analogous operations in GAIGEN, a standard geometric algebra library generator for general-purpose processors. An execution analysis of a raytracing application is also presented. © 2008 Elsevier B.V. All rights reserved.},

keywords = {Application-specific processors, Clifford algebra, Computational geometry, Embedded coprocessors, Field Programmable Gate Arrays, FPGA prototyping, Geometric algebra},

pubstate = {published},

tppubtype = {article}

}